Computer Architecture

A.Y. 2024/2025
6
Max ECTS
48
Overall hours
SSD
INF/01
Language
Italian
Learning objectives
The course aims at introducing basic concepts of hardware and firmware architectures of computing systems, starting from digital circuit fundamentals up to the description of behavior and structure of the main parts of a computing system and its programming in machine language.
Expected learning outcomes
Students are expected to master information encoding techniques, Boolean algebra, and key notions of logic circuits. They will have to demonstrate understanding of role and behavior of basic elements related to structure and functioning of a computer. Students will have also to be able to translate simple algorithms into the machine language of the reference processor adopted in the course.
Single course

This course can be attended as a single course.

Course syllabus and organization

Single session

Responsible
Lesson period
Second semester
On line course
Course syllabus
Information representation
Boolean algebra and combinatorial circuits
Introduction to sequential circuits and memory elements
Introduction to processor architectures
Processor MIPS
Assembly MIPS and binary formats
High level control structures in MIPS
Hw design of a simple processor
Prerequisites for admission
none
Teaching methods
Frontal lessons
Teaching Resources
Computer Organization and Design: The Hardware/Software Interface, Mips Edition,i David A. Patterson, John L. Hennessy
Assessment methods and Criteria
The exam consists of a written test. The test contains a set of exercises. Every exercise is assigned a score. The sum of scores determines the final mark. During the test, students can use 1 A4 sheet for notes. The test result will be communicated on Ariel before being registered.
INF/01 - INFORMATICS - University credits: 6
Lessons: 48 hours
Shifts:
Turno
Professor: Damiani Maria Luisa